1. Field of the Invention
The invention relates to an integrated circuit (IC) tester adjusting unit to be used for adjusting an IC tester.
2. Description of the Related Art
It is well known that an IC tester is a unit for testing operating characteristics of various ICs, wherein the IC tester tests whether the ICs are in a normal operating condition or not by evaluating output signals relative to testing input signals. With such an IC tester, the relation between timing of mutual testing input signals is periodically or arbitrarily adjusted, and an adjusting unit which is specially designed for the adjustment, namely, an IC tester adjusting unit is employed for such an adjustment. Adjustment of the relation between timing of the mutual testing input signals using such an IC tester adjusting unit becomes very important as ICs have been recently speeded up, and hence the number of adjustment for testing operating characteristics of ICs is increased to secure accuracy thereof.
FIG. 3 is a perspective view showing a general construction of a conventional IC tester adjusting unit. In FIG. 3, depicted by 1 is a board frame, 2 a test board, 3 a robot frame, 4 a robot, 5 a measuring probe, 6 signal pads, 7 a controller, 8 positioning pins, 9 a measuring unit, 10 an IC tester. The board frame 1 supports the test board 2 and has positioning pins 8 for adjusting a positional relation between itself and the robot frame 3 at four corners thereof.
The test board 2 is a printed-circuit board having a plurality of signal pads 6 are formed on the surface thereof, and it is mounted on the board frame 1 at a given position. Testing input signals which are to be inputted to an IC to be tested are supplied from the IC tester 10 to each of the signal pads 6. The testing input signals are supplied to the test board 2 via connectors provided on the back face of the test board 2, and then they are supplied to the signal pads 6 via pattern wirings formed on the test board
In FIG. 3, six signal pads 6 are illustrated by example for explaining the general construction of the conventional IC tester adjusting unit, the signal pads 6 are formed on the test board 2 by the number corresponding to the testing input signals to be inputted to the IC to be tested. With the test board 2 for testing a plurality of ICs, many signal pads 6 are formed on the test board 2 by the number obtained by multiplying the number of testing input signals by the number of ICs. Such signal pads 6 are brought into contact with under pressure and connected to each input pin of the ICs to be tested when testing the ICs via relay pins so that the testing input signals are inputted to each input pin.
The robot frame 3 is a metal frame for supporting the robot 4, and has positioning holes 3a which engage with the positioning pins 8 at four corners thereof. The robot 4 positions and sets the measuring probe 5 on each of the signal pads 6 by moving the measuring probe 5 dimensionally within an X-Y plane which is in parallel with the test board 2, and it also lowers the measuring probe 5 to allow the measuring probe 5 to contact the signal pads 6 under pressure. The measuring probe 5 supplies testing input signals, which are to be supplied to the signal pads 6, to the measuring unit 9. The controller 7 controls the operation of the robot 4. The measuring unit 9 measures timing of input signals.
With the IC tester adjusting unit having the foregoing construction, the measuring probe 5 is positioned and set onto the signal pads 6 by the operation of the robot 4. When the positioning pins 8 of the board frame 1 is engaged or filled in the positioning holes 3a of the robot frame 3, the positional relation between the robot 4 and the test board 2 is prescribed with high accuracy so that the robot 4 can position and set the measuring probe 5 onto the signal pads 6 with accuracy. When the measuring probe 5, which was positioned and set onto the signal pads 6 with accuracy, is brought into contact with the signal pads 6, the testing input signals are supplied to the measuring unit 9 where timing between the testing input signals are measured so that the IC tester 10 is adjusted in the manner that timing of the testing input signals become a given timing relation.
However, the conventional IC tester adjusting unit has the following problem.
(1) Since the positioning pins 8 need to be provided on the board frame 1, a cost of the IC tester adjusting unit increases by such a provision of the positioning pins 8.
(2) The positioning pins 8 restrict the design of the test board 2, namely, it is necessary to design the size and shape of the test board 2 considering the presence of the positioning pins 8.
(3) If the board frame 1 and test board 2 are deformed under the influence of an ambient temperature and the like, the positional displacement between the measuring probe 5 and signal pads 6 caused by this deformation cannot be corrected.
(4) If the signal pads 6 are further reduced in an area and highly integrated, the measuring probe 5 cannot be positioned and set onto the signal pads 6 with accuracy.
The invention has been developed to overcome the foregoing problems of the conventional IC tester adjusting unit, and has the following objects.
(1) The measuring probe can be positioned and set onto the signal pads with high accuracy without providing the positioning pins on the board frame.
(2) A cost of the IC tester adjusting unit can be reduced.
(3) Degree of freedom in designing the test board is improved.
(4) The measuring probe can be positioned and set onto the signal pads with high accuracy regardless of the deformation of the board frame or test board or tendency of small area and high integration of the signal pads.
To achieve the above objects, the invention adopts an IC tester adjusting unit as first means including signal pads 6 formed on a test board 2xe2x80x2 for testing operating characteristics of an IC to be tested by allowing the signal pads 6 to contact the IC to be tested to input testing input signals to the IC to be tested, and by evaluating output signals outputted from the IC to be tested relative to the testing input signals, said IC tester adjusting unit further comprising a robot 4, a measuring probe 5, and a plurality of position correcting electrodes 11 to which fixed voltages are applied discretely disposed on the test board 2xe2x80x2, wherein the measuring probe 5 is brought into contact with the signal pads 6 when the measuring probe 5 is moved by the robot 4, thereby detecting timing of the testing input signals supplied to the signal pads 6 so as to adjust the timing of the testing input signals based on the result of detection and wherein positions of the position correcting electrodes 11 are detected by the measuring probe 5 so as to prescribe a relative positional relation between a robot coordinate system of the robot 4 and the test board 2xe2x80x2.
The invention adopts the IC tester adjusting unit as second means wherein in the first means three position correcting electrodes 11 are disposed on the test board 2xe2x80x2 so as to form a triangle as large as possible while apexes of the triangle are expanded to the utmost on the test boards 2xe2x80x2.
The invention adopts the IC tester adjusting unit as third means wherein in the first or second means the positions of the position correcting electrodes 11 are detected by detecting voltages on the position correcting electrodes 11 and a plurality of points around the periphery of the position correcting electrodes 11.
The invention adopts the IC tester adjusting unit as fourth means wherein in any of the first to third means each position correcting electrode 11 is circular, and a central point of each position correcting electrode 11 is detected as a position of each position correcting electrode 11.
The invention adopts the IC tester adjusting unit as fifth means wherein in any of first to fourth means, the signal pads 6 are used instead of the position correcting electrodes 11.